LONDON — P.A. Semi Inc., founded by microprocessor designer Dan Dobberpuhl, has announced the PWRficient processor family, a 64-bit multicore, scalable processor line based on the Power Architecture from IBM.
The company, mainly silent for the last two years, already has 150 people on its engineering team and claims its processor architecture can deliver a tenfold advantage in performance per watt over existing processors while achieving in excess of 2-GHz clock frequency. However, despite the length of time spent working in secrecy and the number of people on the project the first samples are not expected until Q3 next year.
The first implementation of the company’s architecture, a dual-core version, is expected to sample in the third calendar quarter of 2006, with single-core and quad-core versions due in early and late 2007, respectively, and an eight-core version planned for 2008. However, the company did not say what manufacturing process technology the company is targeting and how much of the performance increase is expected to come from moving down the miniaturization roadmap, a strategy open to rival processor vendors.
The company's declared objective is to be the premier supplier of microprocessor-based silicon system solutions to the high-end consumer portable, server blade and network infrastructure markets. This makes it sound like P.A.Semi wants to be a microprocessor company and compete, or help others compete, against Intel's Pentium and Sony's Cell processors. The PWRficient launch does nothing to change that impression.
Dobberpuhl, cofounder, president and chief executive officer of P.A. Semi (Santa Clara, Calif.), was the lead designer of the Alpha and StrongARM series of microprocessors from Digital Equipment Corp. The company said its engineering team also includes key designers of other leading processor architectures, such as Opteron, Itanium, and UltraSPARC.
The PWRficient processor architecture is underpinned by 50 patents filed and pending and operates at up to 2.5-GHz clock frequency, P.A.Semi said. The first PWRficient processor, the PA6T-1682M, is a dual-core chip running at 2-GHz clock frequency that typically dissipates between 5 watts and 13 watts depending upon the application, the company said.
The stand out feature of the PWRficient processor is that it has been designed from the ground up with a modular architecture that allows processor cores, memory controllers, cache, and I/O communications SERDES to be added easily, the company said.
As a result the balance of resources can be changed for different applications and P.A.Semi expects to tape out additional processor implementations easily and frequently targeting a variety of applications. These applications include high-performance computing, embedded datacommunications and telecommunications, storage, and other embedded consumer applications.
Silicon next year
The PA6T-1682M includes two DDR2 memory controllers, 2-Mbyte of L2 cache, and a flexible I/O subsystem that supports eight PCI Express controllers, two 10-Gbit per second Ethernet XAUI controllers, and four Gigabit Ethernet SGMII controllers sharing 24 SERDES lanes. The PWRficient architecture includes a crossbar switch called Conexium, which interconnects multiple Power cores, L2 caches, memory controllers, and the Envio I/O subsystem. The architecture also supports a variety of “offload engines”, including support for TCP/IP, iSCSI, cryptography (IPSec and SSL), and RAID.
The processor architecture is also defined in terms of the pinning of packages. Customers can design to a specific socket, instead of a specific processor, to enable easy migration to compatible processors, the company said. Initial socket definitions include the "E" socket (entry), "M" socket (midrange), and "P" socket (performance). P.A.Semi has worked with a number of industry companies over the two years since its formation. As well as taking a license from IBM to use the Power processor, the company has partnership deals with Micron Technologies Inc., MontaVista Software, QNX Software Systems, and Wind River Inc., amongst others. The company is backed by venture-capital firms, Bessemer Venture Partners and Venrock Associates.
“The next wave of microprocessor innovation is contingent on solving the problem of dramatically increased power consumption,” said Dobberpuhl in a statement.