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Oki claims record amplification with GaN power transistor

Posted by iTech - 2005-10-18

LONDON — Oki Electric Industry Co., Ltd. has developed a GaN-HEMT power transistor on silicon substrates that it says dramatically improves amplifying performance compared with other available power transistors.

The company revealed details of the device, which it is targeting at WiMAX products, at this week’s conference of the Electrochemical Society, being held in Los Angeles.

The Gallium Nitride High Electron Mobility Transistor, formed on a large diameter silicon substrate, exhibited a record for transconductance rating of 350mS/mm and maximum oscillation frequency (fmax) of 115GHz.

The transistor also achieved a 56GHz current gain cut-off frequency. This is a significant improvement from previous GaN-HEMT on silicon substrate devices, which had a range of 70 to 80 GHz fmax, and achieves a performance equivalent to GaN-HEMT on SiC substrates.

Oki says that since the transistors are made on a silicon wafer — not on conventional SiC — costs can be reduces by approximately 50 percent. Volume shipments of the devices are scheduled to start in 2007. "Succeeding in improving amplifying characteristics for power transistors is an exciting achievement for Oki, as the market has been in need of smaller and lower power consumption wireless communication systems," said Harushige Sugimoto, Senior Vice President and Chief Technology Officer of Oki Electric. The major advantage of using SiC substrates for power transistors using GaN is easy crystal growth. However, Oki says, there have been problems with SiC boards for its low quality, difficulty to shift to larger diameters, and expensive substrate costs.

The latest device is a high electron mobility transistor (HEMT), which Oki says grows the AlGaN/GaN structure on the silicon substrate with very few defects and is fifty to a hundred times lower cost than SiC.

The company says it managed to achieve such high ratings by developing a technology to form the gate electrode on a recessed structure, reducing gate length to 0.2micron developing a recessed structure for the ohmic electrodes, and optimizing the device structure.

The device was jointly developed with the Research Center for Micro-Structure Devices at the Nagoya Institute of Technology and part funded by grants from the Research Promotion Bureau of Japan's Ministry of Education, Science and Technology.

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